Wayne Morellini
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There are a few things to increasing performance. Forbstarters, the way the ISA, chip and techniques, as well as optimization for a ancient Unix like systems, and its c language. What happened is that the chips become bigger and bigger trying to optimize the logical system, this further takes up more space, reducing the performance per area, though maybe achieving a better IPC, just you vsn got less fires in. Now packaging affects transference off and on chip, a big deficit can be caused by thus, as can be seen in memory. So the closer you can pack the memory into the processor the better (realise what is going to happen in the market here, and who has which technology that suites which market). So, on the same die is best (apparently, but). However, processes for processors are Ill suited to cheap dense memory, and static ram is big. There has been some attempts to produce a go between process, but I suspect that is a compromise in performance at least. Now, 1-3 transistor ram is interesting relying on substrate capacitance, however how suitable the process it would be for processors I don't know (either forgotten or didn't get to it before I gave up). However, you can run normal dram much faster with much wider internal data paths on chip with on chip processing circuits, and very cheap . The problem is that these dram processes have few layers and no complex processor can go on them. I'm working on some calculation engine for this. We might be able to mate a conventional due into a memory die containing calculation circuits and memory and main memory. The whole GP-GPU thing will start to look like a bad dream.. Let's visit that too. The way you design things can give better performance density at lower transistor counts. But GPU standards have been set, and a set standard restricts redefinition to a more effective one. But once you obtain the best, then it is time to make less changes.
#honesty
